Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:12.1 (WebPack) - M.53d Target Family: Spartan3A and Spartan3AN
OS Platform: NT Target Device: xc3s400an
Project ID (random number) 684acf2150724198a130877b888bb684.ef6b3911ff9e4125b39cd6f8f1258fce.2 Target Package: fgg400
Registration ID 176036481_0_0_631 Target Speed: -4
Date Generated 2015-07-12T01:47:25 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows XP Professional OS Release Service Pack 3 (build 2600)
CPU Name Intel(R) Xeon(R) CPU W3520 @ 2.67GHz CPU Speed 2666 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=87
  • AGG_IO=87
  • AGG_SLICE=1899
  • NUM_4_INPUT_LUT=3287
  • NUM_BONDED_IBUF=42
  • NUM_BONDED_IOB=45
  • NUM_BUFGMUX=6
  • NUM_CYMUX=625
  • NUM_DCM=2
  • NUM_IOB_FF=4
  • NUM_LUT_RT=215
  • NUM_MULTAND=22
  • NUM_RAMB16BWE=6
  • NUM_ROM16=40
  • NUM_SLICEL=1879
  • NUM_SLICEM=20
  • NUM_SLICE_FF=1228
  • NUM_XOR=418
 		NetStatistics
  • NumNets_Active=3733
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=87
  • NumNodesOfType_Active_BRAMDUMMY=92
  • NumNodesOfType_Active_CLKPIN=802
  • NumNodesOfType_Active_CNTRLPIN=998
  • NumNodesOfType_Active_DOUBLE=7801
  • NumNodesOfType_Active_DUMMY=9455
  • NumNodesOfType_Active_DUMMYBANK=89
  • NumNodesOfType_Active_DUMMYESC=14
  • NumNodesOfType_Active_GLOBAL=213
  • NumNodesOfType_Active_HFULLHEX=84
  • NumNodesOfType_Active_HLONG=14
  • NumNodesOfType_Active_HUNIHEX=470
  • NumNodesOfType_Active_INPUT=10629
  • NumNodesOfType_Active_IOBOUTPUT=14
  • NumNodesOfType_Active_OMUX=3371
  • NumNodesOfType_Active_OUTPUT=3584
  • NumNodesOfType_Active_PREBXBY=2620
  • NumNodesOfType_Active_VFULLHEX=412
  • NumNodesOfType_Active_VLONG=89
  • NumNodesOfType_Active_VUNIHEX=562
  • NumNodesOfType_Gnd_BRAMADDR=3
  • NumNodesOfType_Gnd_BRAMDUMMY=23
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=2
  • NumNodesOfType_Gnd_DOUBLE=34
  • NumNodesOfType_Gnd_DUMMYBANK=5
  • NumNodesOfType_Gnd_HUNIHEX=2
  • NumNodesOfType_Gnd_INPUT=97
  • NumNodesOfType_Gnd_OMUX=67
  • NumNodesOfType_Gnd_OUTPUT=53
  • NumNodesOfType_Gnd_PREBXBY=57
  • NumNodesOfType_Gnd_VFULLHEX=2
  • NumNodesOfType_Gnd_VUNIHEX=1
  • NumNodesOfType_Vcc_BRAMDUMMY=24
  • NumNodesOfType_Vcc_CLKPIN=1
  • NumNodesOfType_Vcc_CNTRLPIN=9
  • NumNodesOfType_Vcc_DUMMYBANK=3
  • NumNodesOfType_Vcc_INPUT=49
  • NumNodesOfType_Vcc_PREBXBY=24
  • NumNodesOfType_Vcc_VCCOUT=46
 SiteStatistics
  • IBUF-DIFFMLR=14
  • IBUF-DIFFMTB=3
  • IBUF-DIFFSLR=19
  • IBUF-DIFFSTB=6
  • IOB-DIFFMLR=6
  • IOB-DIFFMTB=17
  • IOB-DIFFSLR=6
  • IOB-DIFFSTB=16
  • SLICEL-SLICEM=865
 		SiteSummary
  • BUFGMUX=6
  • BUFGMUX_GCLKMUX=6
  • BUFGMUX_GCLK_BUFFER=6
  • DCM=2
  • DCM_DCM=2
  • IBUF=42
  • IBUF_DELAY_ADJ_BBOX=42
  • IBUF_IFF1=1
  • IBUF_INBUF=42
  • IBUF_PAD=42
  • IOB=45
  • IOB_DELAY_ADJ_BBOX=1
  • IOB_INBUF=1
  • IOB_OFF1=3
  • IOB_OUTBUF=45
  • IOB_PAD=45
  • RAMB16BWE=6
  • RAMB16BWE_RAMB16BWE=6
  • SLICEL=1879
  • SLICEL_C1VDD=25
  • SLICEL_C2VDD=20
  • SLICEL_CYMUXF=330
  • SLICEL_CYMUXG=295
  • SLICEL_F=1638
  • SLICEL_F5MUX=210
  • SLICEL_F6MUX=49
  • SLICEL_FAND=12
  • SLICEL_FFX=636
  • SLICEL_FFY=592
  • SLICEL_G=1609
  • SLICEL_GAND=10
  • SLICEL_GNDF=156
  • SLICEL_GNDG=138
  • SLICEL_VDDF=17
  • SLICEL_VDDG=11
  • SLICEL_XORF=210
  • SLICEL_XORG=208
  • SLICEM=20
  • SLICEM_F=20
  • SLICEM_F5MUX=20
  • SLICEM_F6MUX=20
  • SLICEM_G=20
 
Configuration Data
BUFGMUX
  • S=[S_INV:6] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:6]
  • S=[S_INV:6] [S:0]
 DCM
  • PSCLK=[PSCLK_INV:1] [PSCLK:1]
  • PSEN=[PSEN_INV:1] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:1] [PSINCDEC:1]
  • RST=[RST:2] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2:1] [16:1]
  • CLKOUT_PHASE_SHIFT=[NONE:2]
  • CLK_FEEDBACK=[1X:2]
  • DESKEW_ADJUST=[9:2]
  • DFS_FREQUENCY_MODE=[LOW:2]
  • DLL_FREQUENCY_MODE=[LOW:2]
  • DUTY_CYCLE_CORRECTION=[TRUE:2]
  • FACTORY_JF1=[0XC0:2]
  • FACTORY_JF2=[0X80:2]
  • PSCLK=[PSCLK_INV:1] [PSCLK:1]
  • PSEN=[PSEN_INV:1] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:1] [PSINCDEC:1]
  • RST=[RST:2] [RST_INV:0]
 IBUF
  • ICLK1=[ICLK1_INV:0] [ICLK1:1]
  • SR=[SR:1] [SR_INV:0]
 IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:42]
  • IBUF_DELAY_VALUE=[DLY0:42]
  • IFD_DELAY_VALUE=[DLY0:41] [DLY5:1]
  • SEL_IN=[SEL_IN:42] [SEL_IN_INV:0]
 IBUF_IFF1
  • CK=[CK:1] [CK_INV:0]
  • IFF1_INIT_ATTR=[INIT0:1]
  • IFF1_SR_ATTR=[SRLOW:1]
  • IFFATTRBOX=[SYNC:1]
  • LATCH_OR_FF=[FF:1]
  • SR=[SR:1] [SR_INV:0]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:42]
 IOB
  • O1=[O1_INV:3] [O1:42]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:3]
  • T1=[T1_INV:0] [T1:1]
 IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:1]
  • IBUF_DELAY_VALUE=[DLY0:1]
  • IFD_DELAY_VALUE=[DLY0:1]
  • SEL_IN=[SEL_IN:1] [SEL_IN_INV:0]
 IOB_OFF1
  • CK=[CK:3] [CK_INV:0]
  • D=[D:3] [D_INV:0]
  • LATCH_OR_FF=[FF:3]
  • OFF1_INIT_ATTR=[INIT0:3]
 IOB_OUTBUF
  • IN=[IN_INV:3] [IN:42]
  • SUSPEND=[3STATE:45]
  • TRI=[TRI_INV:0] [TRI:1]
 IOB_PAD
  • DRIVEATTRBOX=[12:45]
  • IOATTRBOX=[LVCMOS25:45]
  • SLEW=[SLOW:45]
 RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:6]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENA=[ENA_INV:0] [ENA:6]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:6]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:6] [WEA0_INV:0]
  • WEA1=[WEA1:6] [WEA1_INV:0]
  • WEA2=[WEA2:6] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:6]
  • WEB0=[WEB0:2] [WEB0_INV:4]
  • WEB1=[WEB1:2] [WEB1_INV:4]
  • WEB2=[WEB2_INV:4] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:4]
 RAMB16BWE_RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:6]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • DATA_WIDTH_A=[4:2] [9:4]
  • DATA_WIDTH_B=[0:4] [9:2]
  • ENA=[ENA_INV:0] [ENA:6]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:6]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:6] [WEA0_INV:0]
  • WEA1=[WEA1:6] [WEA1_INV:0]
  • WEA2=[WEA2:6] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:6]
  • WEB0=[WEB0:2] [WEB0_INV:4]
  • WEB1=[WEB1:2] [WEB1_INV:4]
  • WEB2=[WEB2_INV:4] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:4]
  • WRITE_MODE_A=[WRITE_FIRST:6]
  • WRITE_MODE_B=[WRITE_FIRST:6]
 SLICEL
  • BX=[BX_INV:9] [BX:391]
  • BY=[BY:236] [BY_INV:11]
  • CE=[CE:505] [CE_INV:40]
  • CIN=[CIN_INV:0] [CIN:274]
  • CLK=[CLK:762] [CLK_INV:24]
  • SR=[SR:418] [SR_INV:32]
 SLICEL_CYMUXF
  • 0=[0:313] [0_INV:0]
  • 1=[1_INV:5] [1:325]
 SLICEL_CYMUXG
  • 0=[0:284] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:208] [S0_INV:2]
 SLICEL_F6MUX
  • S0=[S0:48] [S0_INV:1]
 SLICEL_FFX
  • CE=[CE:444] [CE_INV:32]
  • CK=[CK:625] [CK_INV:11]
  • D=[D:634] [D_INV:2]
  • FFX_INIT_ATTR=[INIT0:585] [INIT1:51]
  • FFX_SR_ATTR=[SRLOW:588] [SRHIGH:48]
  • LATCH_OR_FF=[FF:636]
  • REV=[REV_INV:0] [REV:13]
  • SR=[SR:316] [SR_INV:26]
  • SYNC_ATTR=[ASYNC:343] [SYNC:293]
 SLICEL_FFY
  • CE=[CE:405] [CE_INV:15]
  • CK=[CK:569] [CK_INV:23]
  • D=[D:582] [D_INV:10]
  • FFY_INIT_ATTR=[INIT0:538] [INIT1:54]
  • FFY_SR_ATTR=[SRLOW:541] [SRHIGH:51]
  • LATCH_OR_FF=[FF:592]
  • REV=[REV_INV:0] [REV:1]
  • SR=[SR:280] [SR_INV:25]
  • SYNC_ATTR=[ASYNC:343] [SYNC:249]
 SLICEL_XORF
  • 1=[1_INV:5] [1:205]
 SLICEM
  • BX=[BX_INV:0] [BX:20]
  • BY=[BY:20] [BY_INV:0]
 SLICEM_F
  • LUT_OR_MEM=[ROM:20]
 SLICEM_F5MUX
  • S0=[S0:20] [S0_INV:0]
 SLICEM_F6MUX
  • S0=[S0:20] [S0_INV:0]
 SLICEM_G
  • LUT_OR_MEM=[ROM:20]
 
Pin Data
BUFGMUX
  • I0=6
  • O=6
  • S=6
 BUFGMUX_GCLKMUX
  • I0=6
  • OUT=6
  • S=6
 BUFGMUX_GCLK_BUFFER
  • IN=6
  • OUT=6
 DCM
  • CLK0=2
  • CLKFB=2
  • CLKFX=2
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
 DCM_DCM
  • CLK0=2
  • CLKFB=2
  • CLKFX=2
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
 IBUF
  • I=42
  • ICLK1=1
  • IQ1=1
  • PAD=42
  • SR=1
 IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=42
  • IFD_OUT=1
  • SEL_IN=42
 IBUF_IFF1
  • CK=1
  • D=1
  • Q=1
  • SR=1
 IBUF_INBUF
  • IN=42
  • OUT=42
 IBUF_PAD
  • PAD=42
 IOB
  • I=1
  • O1=45
  • OTCLK1=3
  • PAD=45
  • T1=1
 IOB_DELAY_ADJ_BBOX
  • IBUF_OUT=1
  • SEL_IN=1
 IOB_INBUF
  • IN=1
  • OUT=1
 IOB_OFF1
  • CK=3
  • D=3
  • Q=3
 IOB_OUTBUF
  • IN=45
  • OUT=45
  • TRI=1
 IOB_PAD
  • PAD=45
 RAMB16BWE
  • ADDRA10=6
  • ADDRA11=6
  • ADDRA12=6
  • ADDRA13=6
  • ADDRA2=2
  • ADDRA3=6
  • ADDRA4=6
  • ADDRA5=6
  • ADDRA6=6
  • ADDRA7=6
  • ADDRA8=6
  • ADDRA9=6
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=6
  • CLKB=2
  • DIA0=3
  • DIA1=3
  • DIA2=3
  • DIA3=3
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIB0=2
  • DIB1=2
  • DIB2=2
  • DIB3=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIPA0=1
  • DIPB0=2
  • DOA0=6
  • DOA1=6
  • DOA2=6
  • DOA3=6
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=3
  • DOB0=2
  • DOB1=2
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=2
  • DOB6=2
  • DOB7=1
  • DOPA0=1
  • DOPB0=1
  • ENA=6
  • ENB=2
  • SSRA=6
  • SSRB=2
  • WEA0=6
  • WEA1=6
  • WEA2=6
  • WEA3=6
  • WEB0=6
  • WEB1=6
  • WEB2=6
  • WEB3=6
 RAMB16BWE_RAMB16BWE
  • ADDRA10=6
  • ADDRA11=6
  • ADDRA12=6
  • ADDRA13=6
  • ADDRA2=2
  • ADDRA3=6
  • ADDRA4=6
  • ADDRA5=6
  • ADDRA6=6
  • ADDRA7=6
  • ADDRA8=6
  • ADDRA9=6
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=6
  • CLKB=2
  • DIA0=3
  • DIA1=3
  • DIA2=3
  • DIA3=3
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIB0=2
  • DIB1=2
  • DIB2=2
  • DIB3=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIPA0=1
  • DIPB0=2
  • DOA0=6
  • DOA1=6
  • DOA2=6
  • DOA3=6
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=3
  • DOB0=2
  • DOB1=2
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=2
  • DOB6=2
  • DOB7=1
  • DOPA0=1
  • DOPB0=1
  • ENA=6
  • ENB=2
  • SSRA=6
  • SSRB=2
  • WEA0=6
  • WEA1=6
  • WEA2=6
  • WEA3=6
  • WEB0=6
  • WEB1=6
  • WEB2=6
  • WEB3=6
 SLICEL
  • BX=400
  • BY=247
  • CE=545
  • CIN=274
  • CLK=786
  • COUT=295
  • F1=1609
  • F2=1409
  • F3=1020
  • F4=628
  • F5=88
  • FX=10
  • FXINA=49
  • FXINB=49
  • G1=1595
  • G2=1425
  • G3=996
  • G4=594
  • SR=450
  • X=931
  • XB=10
  • XQ=636
  • Y=930
  • YQ=592
 SLICEL_C1VDD
  • 1=25
 SLICEL_C2VDD
  • 1=20
 SLICEL_CYMUXF
  • 0=313
  • 1=330
  • OUT=330
  • S0=330
 SLICEL_CYMUXG
  • 0=284
  • 1=295
  • OUT=295
  • S0=295
 SLICEL_F
  • A1=1605
  • A2=1407
  • A3=1020
  • A4=628
  • D=1638
 SLICEL_F5MUX
  • F=210
  • G=210
  • OUT=210
  • S0=210
 SLICEL_F6MUX
  • 0=49
  • 1=49
  • OUT=49
  • S0=49
 SLICEL_FAND
  • 0=12
  • 1=12
  • O=12
 SLICEL_FFX
  • CE=476
  • CK=636
  • D=636
  • Q=636
  • REV=13
  • SR=342
 SLICEL_FFY
  • CE=420
  • CK=592
  • D=592
  • Q=592
  • REV=1
  • SR=305
 SLICEL_G
  • A1=1591
  • A2=1425
  • A3=996
  • A4=594
  • D=1609
 SLICEL_GAND
  • 0=10
  • 1=10
  • O=10
 SLICEL_GNDF
  • 0=156
 SLICEL_GNDG
  • 0=138
 SLICEL_VDDF
  • 1=17
 SLICEL_VDDG
  • 1=11
 SLICEL_XORF
  • 0=210
  • 1=210
  • O=210
 SLICEL_XORG
  • 0=208
  • 1=208
  • O=208
 SLICEM
  • BX=20
  • BY=20
  • F1=20
  • F2=20
  • F3=20
  • F4=20
  • F5=20
  • FX=20
  • FXINA=20
  • FXINB=20
  • G1=20
  • G2=20
  • G3=20
  • G4=20
 SLICEM_F
  • A1=20
  • A2=20
  • A3=20
  • A4=20
  • D=20
 SLICEM_F5MUX
  • F=20
  • G=20
  • OUT=20
  • S0=20
 SLICEM_F6MUX
  • 0=20
  • 1=20
  • OUT=20
  • S0=20
 SLICEM_G
  • A1=20
  • A2=20
  • A3=20
  • A4=20
  • D=20
 
Software Quality
Run Statistics
Bitgen 12931 12930 0 0 0 0 0
MAP 7051 6853 0 0 0 0 0
NGDBuild 7368 7352 0 0 0 0 0
PAR 6845 6493 322 0 0 0 0
Start 0 0 0 0 0 0 0
_impact 245 241 0 0 0 0 0
bitgen 1 1 0 0 0 0 0
edif2ngd 75004 75000 0 0 0 0 0
map 14 2 0 0 0 0 0
ngc2edif 140 140 0 0 0 0 0
ngcbuild 117 117 0 0 0 0 0
ngdbuild 17 16 0 0 0 0 0
par 2 2 0 0 0 0 0
trce 6499 6495 0 0 0 0 0
xst 7102 6999 0 0 0 0 0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=9
NGDBUILD_NUM_FDC=10 NGDBUILD_NUM_FDCE=6 NGDBUILD_NUM_FDC_1=1 NGDBUILD_NUM_FDE=341
NGDBUILD_NUM_FDP=1 NGDBUILD_NUM_FDPE=10 NGDBUILD_NUM_FDR_1=8 NGDBUILD_NUM_FDSE=2
NGDBUILD_NUM_GND=13 NGDBUILD_NUM_IBUF=10 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=27
NGDBUILD_NUM_IOBUF=1 NGDBUILD_NUM_LUT1=10 NGDBUILD_NUM_LUT2=305 NGDBUILD_NUM_LUT2_D=3
NGDBUILD_NUM_LUT2_L=4 NGDBUILD_NUM_LUT3=72 NGDBUILD_NUM_LUT3_D=3 NGDBUILD_NUM_LUT3_L=4
NGDBUILD_NUM_LUT4=208 NGDBUILD_NUM_LUT4_D=16 NGDBUILD_NUM_LUT4_L=25 NGDBUILD_NUM_MUXCY=114
NGDBUILD_NUM_MUXF5=12 NGDBUILD_NUM_OBUF=44 NGDBUILD_NUM_VCC=12 NGDBUILD_NUM_XORCY=20
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=6 NGDBUILD_NUM_DCM_SP=2 NGDBUILD_NUM_FD=42 NGDBUILD_NUM_FDC=44
NGDBUILD_NUM_FDCE=111 NGDBUILD_NUM_FDCE_1=3 NGDBUILD_NUM_FDC_1=6 NGDBUILD_NUM_FDE=468
NGDBUILD_NUM_FDP=7 NGDBUILD_NUM_FDPE=10 NGDBUILD_NUM_FDPE_1=1 NGDBUILD_NUM_FDR=167
NGDBUILD_NUM_FDRE=272 NGDBUILD_NUM_FDRS=1 NGDBUILD_NUM_FDRSE=15 NGDBUILD_NUM_FDR_1=8
NGDBUILD_NUM_FDS=8 NGDBUILD_NUM_FDSE=79 NGDBUILD_NUM_GND=35 NGDBUILD_NUM_IBUF=41
NGDBUILD_NUM_IBUFG=2 NGDBUILD_NUM_INV=62 NGDBUILD_NUM_LUT1=165 NGDBUILD_NUM_LUT1_L=83
NGDBUILD_NUM_LUT2=886 NGDBUILD_NUM_LUT2_D=3 NGDBUILD_NUM_LUT2_L=169 NGDBUILD_NUM_LUT3=771
NGDBUILD_NUM_LUT3_D=3 NGDBUILD_NUM_LUT3_L=307 NGDBUILD_NUM_LUT4=718 NGDBUILD_NUM_LUT4_D=16
NGDBUILD_NUM_LUT4_L=317 NGDBUILD_NUM_MULT_AND=22 NGDBUILD_NUM_MUXCY=141 NGDBUILD_NUM_MUXCY_L=543
NGDBUILD_NUM_MUXF5=194 NGDBUILD_NUM_MUXF6=34 NGDBUILD_NUM_OBUF=44 NGDBUILD_NUM_OBUFT=1
NGDBUILD_NUM_RAMB16BWE=6 NGDBUILD_NUM_ROM256X1=5 NGDBUILD_NUM_VCC=20 NGDBUILD_NUM_XORCY=456