BUFGMUX
BUFGMUX_GCLKMUX
- DISABLE_ATTR=[LOW:9]
- S=[S_INV:9] [S:0]
DCM
- PSCLK=[PSCLK_INV:2] [PSCLK:1]
- PSEN=[PSEN_INV:2] [PSEN:1]
- PSINCDEC=[PSINCDEC_INV:2] [PSINCDEC:1]
- RST=[RST:3] [RST_INV:0]
DCM_DCM
- CLKDV_DIVIDE=[2:2] [16:1]
- CLKOUT_PHASE_SHIFT=[NONE:3]
- CLK_FEEDBACK=[1X:3]
- DESKEW_ADJUST=[9:3]
- DFS_FREQUENCY_MODE=[LOW:3]
- DLL_FREQUENCY_MODE=[LOW:3]
- DUTY_CYCLE_CORRECTION=[TRUE:3]
- FACTORY_JF1=[0XC0:3]
- FACTORY_JF2=[0X80:3]
- PSCLK=[PSCLK_INV:2] [PSCLK:1]
- PSEN=[PSEN_INV:2] [PSEN:1]
- PSINCDEC=[PSINCDEC_INV:2] [PSINCDEC:1]
- RST=[RST:3] [RST_INV:0]
IBUF_DELAY_ADJ_BBOX
- DELAY_ADJ_ATTRBOX=[FIXED:4]
- IBUF_DELAY_VALUE=[DLY0:4]
- IFD_DELAY_VALUE=[DLY0:4]
- SEL_IN=[SEL_IN:4] [SEL_IN_INV:0]
IBUF_PAD
IOB
- ICE=[ICE:16] [ICE_INV:0]
- ICLK1=[ICLK1_INV:0] [ICLK1:16]
- O1=[O1_INV:0] [O1:46]
- OCE=[OCE:0] [OCE_INV:15]
- OTCLK1=[OTCLK1_INV:0] [OTCLK1:38]
- SR=[SR:0] [SR_INV:37]
- T1=[T1_INV:0] [T1:16]
IOB_DELAY_ADJ_BBOX
- DELAY_ADJ_ATTRBOX=[FIXED:16]
- IBUF_DELAY_VALUE=[DLY0:16]
- IFD_DELAY_VALUE=[DLY5:16]
- SEL_IN=[SEL_IN:16] [SEL_IN_INV:0]
IOB_IFF1
- CE=[CE:16] [CE_INV:0]
- CK=[CK:16] [CK_INV:0]
- IFF1_INIT_ATTR=[INIT0:16]
- IFF1_SR_ATTR=[SRLOW:16]
- IFFATTRBOX=[SYNC:16]
- LATCH_OR_FF=[FF:16]
- SR=[SR:0] [SR_INV:16]
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IOB_OFF1
- CE=[CE:0] [CE_INV:15]
- CK=[CK:38] [CK_INV:0]
- D=[D:38] [D_INV:0]
- LATCH_OR_FF=[FF:38]
- OFF1_INIT_ATTR=[INIT0:1] [INIT1:37]
- OFF1_SR_ATTR=[SRHIGH:37]
- OFFATTRBOX=[SYNC:37]
- SR=[SR:0] [SR_INV:37]
IOB_OUTBUF
- IN=[IN_INV:0] [IN:46]
- SUSPEND=[3STATE:46]
- TRI=[TRI_INV:0] [TRI:16]
IOB_PAD
- DRIVEATTRBOX=[12:46]
- IOATTRBOX=[LVCMOS25:46]
- SLEW=[SLOW:46]
IOB_TFF1
- CK=[CK:16] [CK_INV:0]
- D=[D:16] [D_INV:0]
- LATCH_OR_FF=[FF:16]
- SR=[SR:0] [SR_INV:16]
- TFF1_INIT_ATTR=[INIT1:16]
- TFF1_SR_ATTR=[SRHIGH:16]
- TFFATTRBOX=[SYNC:16]
MULT18X18SIO
- CEA=[CEA_INV:0] [CEA:2]
- CEB=[CEB_INV:0] [CEB:2]
- CEP=[CEP:2] [CEP_INV:0]
- CLK=[CLK:2] [CLK_INV:0]
- RSTA=[RSTA:2] [RSTA_INV:0]
- RSTB=[RSTB:2] [RSTB_INV:0]
- RSTP=[RSTP_INV:0] [RSTP:2]
MULT18X18SIO_MULT18X18SIO
- AREG=[1:2]
- BREG=[1:2]
- B_INPUT=[DIRECT:2]
- CEA=[CEA_INV:0] [CEA:2]
- CEB=[CEB_INV:0] [CEB:2]
- CEP=[CEP:2] [CEP_INV:0]
- CLK=[CLK:2] [CLK_INV:0]
- PREG=[0:2]
- PREG_CLKINVERSION=[0:2]
- RSTA=[RSTA:2] [RSTA_INV:0]
- RSTB=[RSTB:2] [RSTB_INV:0]
- RSTP=[RSTP_INV:0] [RSTP:2]
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RAMB16BWE
- CLKA=[CLKA_INV:0] [CLKA:16]
- CLKB=[CLKB_INV:0] [CLKB:16]
- ENA=[ENA_INV:0] [ENA:16]
- ENB=[ENB_INV:0] [ENB:16]
- SSRA=[SSRA_INV:0] [SSRA:16]
- SSRB=[SSRB_INV:0] [SSRB:16]
- WEA0=[WEA0:16] [WEA0_INV:0]
- WEA1=[WEA1:16] [WEA1_INV:0]
- WEA2=[WEA2:16] [WEA2_INV:0]
- WEA3=[WEA3_INV:0] [WEA3:16]
- WEB0=[WEB0:16] [WEB0_INV:0]
- WEB1=[WEB1:16] [WEB1_INV:0]
- WEB2=[WEB2_INV:0] [WEB2:16]
- WEB3=[WEB3:16] [WEB3_INV:0]
RAMB16BWE_RAMB16BWE
- CLKA=[CLKA_INV:0] [CLKA:16]
- CLKB=[CLKB_INV:0] [CLKB:16]
- DATA_WIDTH_A=[2:16]
- DATA_WIDTH_B=[2:16]
- ENA=[ENA_INV:0] [ENA:16]
- ENB=[ENB_INV:0] [ENB:16]
- SSRA=[SSRA_INV:0] [SSRA:16]
- SSRB=[SSRB_INV:0] [SSRB:16]
- WEA0=[WEA0:16] [WEA0_INV:0]
- WEA1=[WEA1:16] [WEA1_INV:0]
- WEA2=[WEA2:16] [WEA2_INV:0]
- WEA3=[WEA3_INV:0] [WEA3:16]
- WEB0=[WEB0:16] [WEB0_INV:0]
- WEB1=[WEB1:16] [WEB1_INV:0]
- WEB2=[WEB2_INV:0] [WEB2:16]
- WEB3=[WEB3:16] [WEB3_INV:0]
- WRITE_MODE_A=[WRITE_FIRST:16]
- WRITE_MODE_B=[WRITE_FIRST:16]
SLICEL
- BX=[BX_INV:1] [BX:654]
- BY=[BY:446] [BY_INV:10]
- CE=[CE:1103] [CE_INV:11]
- CIN=[CIN_INV:0] [CIN:349]
- CLK=[CLK:1470] [CLK_INV:5]
- SR=[SR:1014] [SR_INV:214]
SLICEL_CYMUXF
- 0=[0:368] [0_INV:0]
- 1=[1_INV:1] [1:367]
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SLICEL_CYMUXG
SLICEL_F5MUX
SLICEL_F6MUX
SLICEL_FFX
- CE=[CE:1005] [CE_INV:9]
- CK=[CK:1300] [CK_INV:3]
- D=[D:1303] [D_INV:0]
- FFX_INIT_ATTR=[INIT0:1255] [INIT1:48]
- FFX_SR_ATTR=[SRLOW:1265] [SRHIGH:38]
- LATCH_OR_FF=[FF:1303]
- REV=[REV_INV:0] [REV:3]
- SR=[SR:934] [SR_INV:154]
- SYNC_ATTR=[ASYNC:225] [SYNC:1078]
SLICEL_FFY
- CE=[CE:857] [CE_INV:9]
- CK=[CK:1101] [CK_INV:4]
- D=[D:1095] [D_INV:10]
- FFY_INIT_ATTR=[INIT0:1040] [INIT1:65]
- FFY_SR_ATTR=[SRLOW:1045] [SRHIGH:60]
- LATCH_OR_FF=[FF:1105]
- REV=[REV_INV:0] [REV:1]
- SR=[SR:693] [SR_INV:184]
- SYNC_ATTR=[ASYNC:242] [SYNC:863]
SLICEL_XORF
SLICEM
- BY=[BY:128] [BY_INV:0]
- CLK=[CLK:128] [CLK_INV:0]
- SR=[SR:128] [SR_INV:0]
SLICEM_F
- DI=[DI:128] [DI_INV:0]
- F_ATTR=[DUAL_PORT:128]
- LUT_OR_MEM=[RAM:128]
SLICEM_G
- DI=[DI:128] [DI_INV:0]
- G_ATTR=[DUAL_PORT:128]
- LUT_OR_MEM=[RAM:128]
SLICEM_WSGEN
- CK=[CK:128] [CK_INV:0]
- WE=[WE_INV:0] [WE:128]
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