Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:12.1 (WebPack) - M.53d Target Family: Spartan3A and Spartan3AN
OS Platform: NT Target Device: xc3s400an
Project ID (random number) 684acf2150724198a130877b888bb684.f8ef66027be74186a1e09567f4a16747.4 Target Package: fgg400
Registration ID 176036481_0_0_631 Target Speed: -4
Date Generated 2015-07-11T23:47:12 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows XP Professional OS Release Service Pack 3 (build 2600)
CPU Name Intel(R) Xeon(R) CPU W3520 @ 2.67GHz CPU Speed 2666 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=82
  • AGG_IO=82
  • AGG_SLICE=2763
  • NUM_4_INPUT_LUT=4600
  • NUM_BONDED_IBUF=4
  • NUM_BONDED_IOB=78
  • NUM_BUFGMUX=8
  • NUM_CYMUX=681
  • NUM_DCM=3
  • NUM_DP_RAM=256
  • NUM_IOB_FF=70
  • NUM_LUT_RT=252
  • NUM_MULT18X18SIO=2
  • NUM_MULTAND=39
  • NUM_RAMB16BWE=8
  • NUM_SLICEL=2635
  • NUM_SLICEM=128
  • NUM_SLICE_FF=2172
  • NUM_XOR=615
 		NetStatistics
  • NumNets_Active=5584
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=192
  • NumNodesOfType_Active_BRAMDUMMY=232
  • NumNodesOfType_Active_CLKPIN=1556
  • NumNodesOfType_Active_CNTRLPIN=2433
  • NumNodesOfType_Active_DOUBLE=16602
  • NumNodesOfType_Active_DUMMY=14487
  • NumNodesOfType_Active_DUMMYBANK=157
  • NumNodesOfType_Active_DUMMYESC=5
  • NumNodesOfType_Active_GLOBAL=318
  • NumNodesOfType_Active_HFULLHEX=241
  • NumNodesOfType_Active_HLONG=43
  • NumNodesOfType_Active_HUNIHEX=1872
  • NumNodesOfType_Active_INPUT=16251
  • NumNodesOfType_Active_IOBOUTPUT=20
  • NumNodesOfType_Active_OMUX=4933
  • NumNodesOfType_Active_OUTPUT=5408
  • NumNodesOfType_Active_PREBXBY=4171
  • NumNodesOfType_Active_VFULLHEX=1307
  • NumNodesOfType_Active_VLONG=268
  • NumNodesOfType_Active_VUNIHEX=2182
  • NumNodesOfType_Gnd_BRAMDUMMY=82
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=4
  • NumNodesOfType_Gnd_DOUBLE=52
  • NumNodesOfType_Gnd_DUMMY=2
  • NumNodesOfType_Gnd_DUMMYBANK=6
  • NumNodesOfType_Gnd_INPUT=125
  • NumNodesOfType_Gnd_OMUX=56
  • NumNodesOfType_Gnd_OUTPUT=36
  • NumNodesOfType_Gnd_PREBXBY=41
  • NumNodesOfType_Gnd_VFULLHEX=4
  • NumNodesOfType_Vcc_BRAMDUMMY=2
  • NumNodesOfType_Vcc_CLKPIN=2
  • NumNodesOfType_Vcc_CNTRLPIN=12
  • NumNodesOfType_Vcc_DUMMYBANK=6
  • NumNodesOfType_Vcc_INPUT=17
  • NumNodesOfType_Vcc_PREBXBY=12
  • NumNodesOfType_Vcc_VCCOUT=21
 SiteStatistics
  • IBUF-DIFFMTB=2
  • IBUF-DIFFSTB=2
  • IOB-DIFFMLR=30
  • IOB-DIFFMTB=7
  • IOB-DIFFSLR=35
  • IOB-DIFFSTB=6
  • SLICEL-SLICEM=1203
 		SiteSummary
  • BUFGMUX=8
  • BUFGMUX_GCLKMUX=8
  • BUFGMUX_GCLK_BUFFER=8
  • DCM=3
  • DCM_DCM=3
  • IBUF=4
  • IBUF_DELAY_ADJ_BBOX=4
  • IBUF_INBUF=4
  • IBUF_PAD=4
  • IOB=78
  • IOB_DELAY_ADJ_BBOX=16
  • IOB_IFF1=16
  • IOB_INBUF=16
  • IOB_OFF1=38
  • IOB_OUTBUF=78
  • IOB_PAD=78
  • IOB_TFF1=16
  • MULT18X18SIO=2
  • MULT18X18SIO_MULT18X18SIO=2
  • RAMB16BWE=8
  • RAMB16BWE_RAMB16BWE=8
  • SLICEL=2635
  • SLICEL_C1VDD=8
  • SLICEL_C2VDD=7
  • SLICEL_CYMUXF=348
  • SLICEL_CYMUXG=333
  • SLICEL_F=2193
  • SLICEL_F5MUX=266
  • SLICEL_F6MUX=5
  • SLICEL_FAND=20
  • SLICEL_FFX=1194
  • SLICEL_FFY=978
  • SLICEL_G=2151
  • SLICEL_GAND=19
  • SLICEL_GNDF=233
  • SLICEL_GNDG=222
  • SLICEL_XORF=307
  • SLICEL_XORG=308
  • SLICEM=128
  • SLICEM_F=128
  • SLICEM_G=128
  • SLICEM_WSGEN=128
 
Configuration Data
BUFGMUX
  • S=[S_INV:8] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:8]
  • S=[S_INV:8] [S:0]
 DCM
  • PSCLK=[PSCLK_INV:2] [PSCLK:1]
  • PSEN=[PSEN_INV:2] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:2] [PSINCDEC:1]
  • RST=[RST:3] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2:2] [16:1]
  • CLKOUT_PHASE_SHIFT=[NONE:3]
  • CLK_FEEDBACK=[1X:3]
  • DESKEW_ADJUST=[9:3]
  • DFS_FREQUENCY_MODE=[LOW:3]
  • DLL_FREQUENCY_MODE=[LOW:3]
  • DUTY_CYCLE_CORRECTION=[TRUE:3]
  • FACTORY_JF1=[0XC0:3]
  • FACTORY_JF2=[0X80:3]
  • PSCLK=[PSCLK_INV:2] [PSCLK:1]
  • PSEN=[PSEN_INV:2] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:2] [PSINCDEC:1]
  • RST=[RST:3] [RST_INV:0]
 IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:4]
  • IBUF_DELAY_VALUE=[DLY0:4]
  • IFD_DELAY_VALUE=[DLY0:4]
  • SEL_IN=[SEL_IN:4] [SEL_IN_INV:0]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:4]
 IOB
  • ICE=[ICE:16] [ICE_INV:0]
  • ICLK1=[ICLK1_INV:0] [ICLK1:16]
  • O1=[O1_INV:16] [O1:62]
  • OCE=[OCE:0] [OCE_INV:15]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:38]
  • SR=[SR:37] [SR_INV:0]
  • T1=[T1_INV:0] [T1:16]
 IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:16]
  • IBUF_DELAY_VALUE=[DLY0:16]
  • IFD_DELAY_VALUE=[DLY5:16]
  • SEL_IN=[SEL_IN:16] [SEL_IN_INV:0]
 IOB_IFF1
  • CE=[CE:16] [CE_INV:0]
  • CK=[CK:16] [CK_INV:0]
  • IFF1_INIT_ATTR=[INIT0:16]
  • IFF1_SR_ATTR=[SRLOW:16]
  • IFFATTRBOX=[SYNC:16]
  • LATCH_OR_FF=[FF:16]
  • SR=[SR:16] [SR_INV:0]
 IOB_OFF1
  • CE=[CE:0] [CE_INV:15]
  • CK=[CK:38] [CK_INV:0]
  • D=[D:38] [D_INV:0]
  • LATCH_OR_FF=[FF:38]
  • OFF1_INIT_ATTR=[INIT0:1] [INIT1:37]
  • OFF1_SR_ATTR=[SRHIGH:37]
  • OFFATTRBOX=[SYNC:37]
  • SR=[SR:37] [SR_INV:0]
 IOB_OUTBUF
  • IN=[IN_INV:16] [IN:62]
  • SUSPEND=[3STATE:78]
  • TRI=[TRI_INV:0] [TRI:16]
 IOB_PAD
  • DRIVEATTRBOX=[12:78]
  • IOATTRBOX=[LVCMOS25:78]
  • SLEW=[SLOW:78]
 IOB_TFF1
  • CK=[CK:16] [CK_INV:0]
  • D=[D:16] [D_INV:0]
  • LATCH_OR_FF=[FF:16]
  • SR=[SR:16] [SR_INV:0]
  • TFF1_INIT_ATTR=[INIT1:16]
  • TFF1_SR_ATTR=[SRHIGH:16]
  • TFFATTRBOX=[SYNC:16]
 MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
 MULT18X18SIO_MULT18X18SIO
  • AREG=[1:2]
  • BREG=[1:2]
  • B_INPUT=[DIRECT:2]
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • PREG=[0:2]
  • PREG_CLKINVERSION=[0:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
 RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:8]
  • CLKB=[CLKB_INV:0] [CLKB:8]
  • ENA=[ENA_INV:0] [ENA:8]
  • ENB=[ENB_INV:0] [ENB:8]
  • SSRA=[SSRA_INV:0] [SSRA:8]
  • SSRB=[SSRB_INV:0] [SSRB:8]
  • WEA0=[WEA0:8] [WEA0_INV:0]
  • WEA1=[WEA1:8] [WEA1_INV:0]
  • WEA2=[WEA2:8] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:8]
  • WEB0=[WEB0:8] [WEB0_INV:0]
  • WEB1=[WEB1:8] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:8]
  • WEB3=[WEB3:8] [WEB3_INV:0]
 RAMB16BWE_RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:8]
  • CLKB=[CLKB_INV:0] [CLKB:8]
  • DATA_WIDTH_A=[4:8]
  • DATA_WIDTH_B=[4:8]
  • ENA=[ENA_INV:0] [ENA:8]
  • ENB=[ENB_INV:0] [ENB:8]
  • SSRA=[SSRA_INV:0] [SSRA:8]
  • SSRB=[SSRB_INV:0] [SSRB:8]
  • WEA0=[WEA0:8] [WEA0_INV:0]
  • WEA1=[WEA1:8] [WEA1_INV:0]
  • WEA2=[WEA2:8] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:8]
  • WEB0=[WEB0:8] [WEB0_INV:0]
  • WEB1=[WEB1:8] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:8]
  • WEB3=[WEB3:8] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:8]
  • WRITE_MODE_B=[WRITE_FIRST:8]
 SLICEL
  • BX=[BX_INV:1] [BX:593]
  • BY=[BY:401] [BY_INV:9]
  • CE=[CE:990] [CE_INV:6]
  • CIN=[CIN_INV:0] [CIN:330]
  • CLK=[CLK:1346] [CLK_INV:4]
  • SR=[SR:1207] [SR_INV:17]
 SLICEL_CYMUXF
  • 0=[0:348] [0_INV:0]
  • 1=[1_INV:1] [1:347]
 SLICEL_CYMUXG
  • 0=[0:333] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:266] [S0_INV:0]
 SLICEL_F6MUX
  • S0=[S0:5] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:902] [CE_INV:5]
  • CK=[CK:1194] [CK_INV:0]
  • D=[D:1194] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:1154] [INIT1:40]
  • FFX_SR_ATTR=[SRLOW:1157] [SRHIGH:37]
  • LATCH_OR_FF=[FF:1194]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:1061] [SR_INV:14]
  • SYNC_ATTR=[ASYNC:127] [SYNC:1067]
 SLICEL_FFY
  • CE=[CE:745] [CE_INV:5]
  • CK=[CK:974] [CK_INV:4]
  • D=[D:969] [D_INV:9]
  • FFY_INIT_ATTR=[INIT0:917] [INIT1:61]
  • FFY_SR_ATTR=[SRLOW:920] [SRHIGH:58]
  • LATCH_OR_FF=[FF:978]
  • REV=[REV_INV:0] [REV:1]
  • SR=[SR:859] [SR_INV:9]
  • SYNC_ATTR=[ASYNC:122] [SYNC:856]
 SLICEL_XORF
  • 1=[1_INV:1] [1:306]
 SLICEM
  • BY=[BY:128] [BY_INV:0]
  • CLK=[CLK:128] [CLK_INV:0]
  • SR=[SR:128] [SR_INV:0]
 SLICEM_F
  • DI=[DI:128] [DI_INV:0]
  • F_ATTR=[DUAL_PORT:128]
  • LUT_OR_MEM=[RAM:128]
 SLICEM_G
  • DI=[DI:128] [DI_INV:0]
  • G_ATTR=[DUAL_PORT:128]
  • LUT_OR_MEM=[RAM:128]
 SLICEM_WSGEN
  • CK=[CK:128] [CK_INV:0]
  • WE=[WE_INV:0] [WE:128]
 
Pin Data
BUFGMUX
  • I0=8
  • O=8
  • S=8
 BUFGMUX_GCLKMUX
  • I0=8
  • OUT=8
  • S=8
 BUFGMUX_GCLK_BUFFER
  • IN=8
  • OUT=8
 DCM
  • CLK0=3
  • CLKDV=1
  • CLKFB=3
  • CLKFX=2
  • CLKIN=3
  • LOCKED=3
  • PSCLK=3
  • PSEN=3
  • PSINCDEC=3
  • RST=3
  • STATUS2=2
 DCM_DCM
  • CLK0=3
  • CLKDV=1
  • CLKFB=3
  • CLKFX=2
  • CLKIN=3
  • LOCKED=3
  • PSCLK=3
  • PSEN=3
  • PSINCDEC=3
  • RST=3
  • STATUS2=2
 IBUF
  • I=4
  • PAD=4
 IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=4
  • SEL_IN=4
 IBUF_INBUF
  • IN=4
  • OUT=4
 IBUF_PAD
  • PAD=4
 IOB
  • ICE=16
  • ICLK1=16
  • IQ1=16
  • O1=78
  • OCE=15
  • OTCLK1=38
  • PAD=78
  • SR=37
  • T1=16
 IOB_DELAY_ADJ_BBOX
  • IFD_OUT=16
  • SEL_IN=16
 IOB_IFF1
  • CE=16
  • CK=16
  • D=16
  • Q=16
  • SR=16
 IOB_INBUF
  • IN=16
  • OUT=16
 IOB_OFF1
  • CE=15
  • CK=38
  • D=38
  • Q=38
  • SR=37
 IOB_OUTBUF
  • IN=78
  • OUT=78
  • TRI=16
 IOB_PAD
  • PAD=78
 IOB_TFF1
  • CK=16
  • D=16
  • Q=16
  • SR=16
 MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P16=2
  • P17=2
  • P18=2
  • P19=1
  • P2=2
  • P20=1
  • P3=2
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
 MULT18X18SIO_MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P16=2
  • P17=2
  • P18=2
  • P19=1
  • P2=2
  • P20=1
  • P3=2
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
 RAMB16BWE
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA2=8
  • ADDRA3=8
  • ADDRA4=8
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • ADDRB10=8
  • ADDRB11=8
  • ADDRB12=8
  • ADDRB13=8
  • ADDRB2=8
  • ADDRB3=8
  • ADDRB4=8
  • ADDRB5=8
  • ADDRB6=8
  • ADDRB7=8
  • ADDRB8=8
  • ADDRB9=8
  • CLKA=8
  • CLKB=8
  • DIB0=8
  • DIB1=8
  • DIB2=8
  • DIB3=8
  • DOA0=8
  • DOA1=8
  • DOA2=8
  • DOA3=8
  • DOB0=8
  • DOB1=8
  • DOB2=8
  • DOB3=8
  • ENA=8
  • ENB=8
  • SSRA=8
  • SSRB=8
  • WEA0=8
  • WEA1=8
  • WEA2=8
  • WEA3=8
  • WEB0=8
  • WEB1=8
  • WEB2=8
  • WEB3=8
 RAMB16BWE_RAMB16BWE
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA2=8
  • ADDRA3=8
  • ADDRA4=8
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • ADDRB10=8
  • ADDRB11=8
  • ADDRB12=8
  • ADDRB13=8
  • ADDRB2=8
  • ADDRB3=8
  • ADDRB4=8
  • ADDRB5=8
  • ADDRB6=8
  • ADDRB7=8
  • ADDRB8=8
  • ADDRB9=8
  • CLKA=8
  • CLKB=8
  • DIB0=8
  • DIB1=8
  • DIB2=8
  • DIB3=8
  • DOA0=8
  • DOA1=8
  • DOA2=8
  • DOA3=8
  • DOB0=8
  • DOB1=8
  • DOB2=8
  • DOB3=8
  • ENA=8
  • ENB=8
  • SSRA=8
  • SSRB=8
  • WEA0=8
  • WEA1=8
  • WEA2=8
  • WEA3=8
  • WEB0=8
  • WEB1=8
  • WEB2=8
  • WEB3=8
 SLICEL
  • BX=594
  • BY=410
  • CE=996
  • CIN=330
  • CLK=1350
  • COUT=333
  • F1=2193
  • F2=2025
  • F3=1645
  • F4=895
  • F5=10
  • FXINA=5
  • FXINB=5
  • G1=2151
  • G2=1992
  • G3=1613
  • G4=893
  • SR=1224
  • X=1365
  • XQ=1194
  • Y=1351
  • YQ=978
 SLICEL_C1VDD
  • 1=8
 SLICEL_C2VDD
  • 1=7
 SLICEL_CYMUXF
  • 0=348
  • 1=348
  • OUT=348
  • S0=348
 SLICEL_CYMUXG
  • 0=333
  • 1=333
  • OUT=333
  • S0=333
 SLICEL_F
  • A1=2185
  • A2=2025
  • A3=1645
  • A4=895
  • D=2193
 SLICEL_F5MUX
  • F=266
  • G=266
  • OUT=266
  • S0=266
 SLICEL_F6MUX
  • 0=5
  • 1=5
  • OUT=5
  • S0=5
 SLICEL_FAND
  • 0=20
  • 1=20
  • O=20
 SLICEL_FFX
  • CE=907
  • CK=1194
  • D=1194
  • Q=1194
  • REV=3
  • SR=1075
 SLICEL_FFY
  • CE=750
  • CK=978
  • D=978
  • Q=978
  • REV=1
  • SR=868
 SLICEL_G
  • A1=2142
  • A2=1990
  • A3=1613
  • A4=893
  • D=2151
 SLICEL_GAND
  • 0=19
  • 1=19
  • O=19
 SLICEL_GNDF
  • 0=233
 SLICEL_GNDG
  • 0=222
 SLICEL_XORF
  • 0=307
  • 1=307
  • O=307
 SLICEL_XORG
  • 0=308
  • 1=308
  • O=308
 SLICEM
  • BY=128
  • CLK=128
  • F1=128
  • F2=128
  • F3=128
  • F4=128
  • G1=128
  • G2=128
  • G3=128
  • G4=128
  • SR=128
  • X=128
 SLICEM_F
  • A1=128
  • A2=128
  • A3=128
  • A4=128
  • D=128
  • DI=128
  • WF1=128
  • WF2=128
  • WF3=128
  • WF4=128
  • WS=128
 SLICEM_G
  • A1=128
  • A2=128
  • A3=128
  • A4=128
  • DI=128
  • WG1=128
  • WG2=128
  • WG3=128
  • WG4=128
  • WS=128
 SLICEM_WSGEN
  • CK=128
  • WE=128
  • WSF=128
  • WSG=128
 
Software Quality
Run Statistics
Bitgen 12911 12910 0 0 0 0 0
MAP 7041 6843 0 0 0 0 0
NGDBuild 7358 7342 0 0 0 0 0
PAR 6835 6483 322 0 0 0 0
Start 0 0 0 0 0 0 0
_impact 245 241 0 0 0 0 0
bitgen 1 1 0 0 0 0 0
edif2ngd 74890 74886 0 0 0 0 0
map 14 2 0 0 0 0 0
ngc2edif 140 140 0 0 0 0 0
ngcbuild 117 117 0 0 0 0 0
ngdbuild 17 16 0 0 0 0 0
par 2 2 0 0 0 0 0
trce 6489 6485 0 0 0 0 0
xst 7095 6992 0 0 0 0 0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=2 NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DCM_SP=1
NGDBUILD_NUM_FD=6 NGDBUILD_NUM_FDCE=4 NGDBUILD_NUM_FDE=160 NGDBUILD_NUM_FDPE=1
NGDBUILD_NUM_FDR=75 NGDBUILD_NUM_FDRE=64 NGDBUILD_NUM_FDR_1=4 NGDBUILD_NUM_FDSE=1
NGDBUILD_NUM_GND=6 NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=19
NGDBUILD_NUM_IOBUF=16 NGDBUILD_NUM_LUT2=152 NGDBUILD_NUM_LUT3=80 NGDBUILD_NUM_LUT4=33
NGDBUILD_NUM_LUT4_D=2 NGDBUILD_NUM_LUT4_L=1 NGDBUILD_NUM_MUXF5=11 NGDBUILD_NUM_NAND3=1
NGDBUILD_NUM_OBUF=62 NGDBUILD_NUM_VCC=5
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND2=8 NGDBUILD_NUM_BUF=2 NGDBUILD_NUM_BUFG=8 NGDBUILD_NUM_DCM_SP=3
NGDBUILD_NUM_FD=19 NGDBUILD_NUM_FDC=3 NGDBUILD_NUM_FDCE=56 NGDBUILD_NUM_FDCPE=1
NGDBUILD_NUM_FDE=166 NGDBUILD_NUM_FDP=4 NGDBUILD_NUM_FDPE=3 NGDBUILD_NUM_FDR=470
NGDBUILD_NUM_FDRE=1473 NGDBUILD_NUM_FDRS=1 NGDBUILD_NUM_FDRSE=3 NGDBUILD_NUM_FDR_1=4
NGDBUILD_NUM_FDS=94 NGDBUILD_NUM_FDSE=58 NGDBUILD_NUM_GND=26 NGDBUILD_NUM_IBUF=18
NGDBUILD_NUM_IBUFG=2 NGDBUILD_NUM_INV=32 NGDBUILD_NUM_LUT1=172 NGDBUILD_NUM_LUT1_L=147
NGDBUILD_NUM_LUT2=652 NGDBUILD_NUM_LUT2_L=152 NGDBUILD_NUM_LUT3=1039 NGDBUILD_NUM_LUT3_L=680
NGDBUILD_NUM_LUT4=1238 NGDBUILD_NUM_LUT4_D=2 NGDBUILD_NUM_LUT4_L=598 NGDBUILD_NUM_MULT18X18SIO=2
NGDBUILD_NUM_MULT_AND=39 NGDBUILD_NUM_MUXCY=4 NGDBUILD_NUM_MUXCY_L=677 NGDBUILD_NUM_MUXF5=275
NGDBUILD_NUM_MUXF6=5 NGDBUILD_NUM_NAND3=1 NGDBUILD_NUM_OBUF=62 NGDBUILD_NUM_OBUFT=16
NGDBUILD_NUM_RAMB16BWE=8 NGDBUILD_NUM_VCC=16 NGDBUILD_NUM_XORCY=615