Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:12.1 (WebPack) - M.53d Target Family: Spartan3A and Spartan3AN
OS Platform: NT Target Device: xc3s400an
Project ID (random number) 684acf2150724198a130877b888bb684.6d27d0dcd0234dcd8707c2d0e7fe87fa.10 Target Package: fgg400
Registration ID 176036481_0_0_631 Target Speed: -4
Date Generated 2015-07-11T23:00:38 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows XP Professional OS Release Service Pack 3 (build 2600)
CPU Name Intel(R) Xeon(R) CPU W3520 @ 2.67GHz CPU Speed 2666 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=40
  • AGG_IO=40
  • AGG_SLICE=1423
  • NUM_4_INPUT_LUT=2352
  • NUM_BONDED_IBUF=4
  • NUM_BONDED_IOB=36
  • NUM_BUFGMUX=11
  • NUM_CYMUX=1232
  • NUM_DCM=2
  • NUM_IOB_FF=4
  • NUM_LUT_RT=418
  • NUM_RAMB16BWE=2
  • NUM_SLICEL=1419
  • NUM_SLICEM=4
  • NUM_SLICE_FF=1131
  • NUM_SLICE_LATCH=10
  • NUM_XOR=489
 		NetStatistics
  • NumNets_Active=2438
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=32
  • NumNodesOfType_Active_BRAMDUMMY=55
  • NumNodesOfType_Active_CLKPIN=701
  • NumNodesOfType_Active_CNTRLPIN=562
  • NumNodesOfType_Active_DOUBLE=4443
  • NumNodesOfType_Active_DUMMY=4547
  • NumNodesOfType_Active_DUMMYBANK=46
  • NumNodesOfType_Active_DUMMYESC=5
  • NumNodesOfType_Active_GLOBAL=189
  • NumNodesOfType_Active_HFULLHEX=60
  • NumNodesOfType_Active_HLONG=17
  • NumNodesOfType_Active_HUNIHEX=213
  • NumNodesOfType_Active_INPUT=5731
  • NumNodesOfType_Active_IOBOUTPUT=5
  • NumNodesOfType_Active_OMUX=2308
  • NumNodesOfType_Active_OUTPUT=2460
  • NumNodesOfType_Active_PREBXBY=1424
  • NumNodesOfType_Active_VFULLHEX=193
  • NumNodesOfType_Active_VLONG=48
  • NumNodesOfType_Active_VUNIHEX=293
  • NumNodesOfType_Vcc_BRAMDUMMY=4
  • NumNodesOfType_Vcc_CLKPIN=1
  • NumNodesOfType_Vcc_CNTRLPIN=13
  • NumNodesOfType_Vcc_DUMMYBANK=3
  • NumNodesOfType_Vcc_INPUT=72
  • NumNodesOfType_Vcc_PREBXBY=66
  • NumNodesOfType_Vcc_VCCOUT=73
 SiteStatistics
  • IBUF-DIFFMTB=2
  • IBUF-DIFFSTB=2
  • IOB-DIFFMLR=3
  • IOB-DIFFMTB=15
  • IOB-DIFFSLR=3
  • IOB-DIFFSTB=15
  • SLICEL-SLICEM=483
 		SiteSummary
  • BUFGMUX=11
  • BUFGMUX_GCLKMUX=11
  • BUFGMUX_GCLK_BUFFER=11
  • DCM=2
  • DCM_DCM=2
  • IBUF=4
  • IBUF_DELAY_ADJ_BBOX=4
  • IBUF_IFF1=1
  • IBUF_INBUF=4
  • IBUF_PAD=4
  • IOB=36
  • IOB_OFF1=3
  • IOB_OUTBUF=36
  • IOB_PAD=36
  • RAMB16BWE=2
  • RAMB16BWE_RAMB16BWE=2
  • SLICEL=1419
  • SLICEL_C1VDD=64
  • SLICEL_C2VDD=61
  • SLICEL_CYMUXF=629
  • SLICEL_CYMUXG=603
  • SLICEL_F=1177
  • SLICEL_F5MUX=129
  • SLICEL_F6MUX=22
  • SLICEL_FFX=560
  • SLICEL_FFY=581
  • SLICEL_G=1167
  • SLICEL_GNDF=353
  • SLICEL_GNDG=345
  • SLICEL_VDDF=13
  • SLICEL_VDDG=4
  • SLICEL_XORF=258
  • SLICEL_XORG=231
  • SLICEM=4
  • SLICEM_F=4
  • SLICEM_F5MUX=4
  • SLICEM_F6MUX=4
  • SLICEM_G=4
 
Configuration Data
BUFGMUX
  • S=[S_INV:11] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:11]
  • S=[S_INV:11] [S:0]
 DCM
  • PSCLK=[PSCLK_INV:1] [PSCLK:1]
  • PSEN=[PSEN_INV:1] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:1] [PSINCDEC:1]
  • RST=[RST:2] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2:1] [16:1]
  • CLKOUT_PHASE_SHIFT=[NONE:2]
  • CLK_FEEDBACK=[1X:2]
  • DESKEW_ADJUST=[9:2]
  • DFS_FREQUENCY_MODE=[LOW:2]
  • DLL_FREQUENCY_MODE=[LOW:2]
  • DUTY_CYCLE_CORRECTION=[TRUE:2]
  • FACTORY_JF1=[0XC0:2]
  • FACTORY_JF2=[0X80:2]
  • PSCLK=[PSCLK_INV:1] [PSCLK:1]
  • PSEN=[PSEN_INV:1] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:1] [PSINCDEC:1]
  • RST=[RST:2] [RST_INV:0]
 IBUF
  • ICLK1=[ICLK1_INV:0] [ICLK1:1]
 IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:4]
  • IBUF_DELAY_VALUE=[DLY0:4]
  • IFD_DELAY_VALUE=[DLY0:3] [DLY5:1]
  • SEL_IN=[SEL_IN:4] [SEL_IN_INV:0]
 IBUF_IFF1
  • CK=[CK:1] [CK_INV:0]
  • IFF1_INIT_ATTR=[INIT0:1]
  • LATCH_OR_FF=[FF:1]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:4]
 IOB
  • O1=[O1_INV:2] [O1:34]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:3]
 IOB_OFF1
  • CK=[CK:3] [CK_INV:0]
  • D=[D:3] [D_INV:0]
  • LATCH_OR_FF=[FF:3]
  • OFF1_INIT_ATTR=[INIT0:3]
 IOB_OUTBUF
  • IN=[IN_INV:2] [IN:34]
  • SUSPEND=[3STATE:36]
 IOB_PAD
  • DRIVEATTRBOX=[12:36]
  • IOATTRBOX=[LVCMOS25:36]
  • SLEW=[SLOW:36]
 RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENA=[ENA_INV:0] [ENA:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:2]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:2] [WEA0_INV:0]
  • WEA1=[WEA1:2] [WEA1_INV:0]
  • WEA2=[WEA2:2] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:2]
  • WEB0=[WEB0:2] [WEB0_INV:0]
  • WEB1=[WEB1:2] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:0]
 RAMB16BWE_RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • DATA_WIDTH_A=[9:1] [18:1]
  • DATA_WIDTH_B=[9:1] [18:1]
  • ENA=[ENA_INV:0] [ENA:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:2]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:2] [WEA0_INV:0]
  • WEA1=[WEA1:2] [WEA1_INV:0]
  • WEA2=[WEA2:2] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:2]
  • WEB0=[WEB0:2] [WEB0_INV:0]
  • WEB1=[WEB1:2] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:2]
  • WRITE_MODE_B=[WRITE_FIRST:2]
 SLICEL
  • BX=[BX_INV:19] [BX:368]
  • BY=[BY:163] [BY_INV:55]
  • CE=[CE:289] [CE_INV:34]
  • CIN=[CIN_INV:0] [CIN:538]
  • CLK=[CLK:638] [CLK_INV:51]
  • SR=[SR:212] [SR_INV:25]
 SLICEL_CYMUXF
  • 0=[0:616] [0_INV:0]
  • 1=[1_INV:2] [1:627]
 SLICEL_CYMUXG
  • 0=[0:599] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:113] [S0_INV:16]
 SLICEL_F6MUX
  • S0=[S0:8] [S0_INV:14]
 SLICEL_FFX
  • CE=[CE:259] [CE_INV:32]
  • CK=[CK:528] [CK_INV:32]
  • D=[D:559] [D_INV:1]
  • FFX_INIT_ATTR=[INIT0:555] [INIT1:5]
  • FFX_SR_ATTR=[SRLOW:558] [SRHIGH:2]
  • LATCH_OR_FF=[FF:555] [LATCH:5]
  • REV=[REV_INV:0] [REV:64]
  • SR=[SR:166] [SR_INV:23]
  • SYNC_ATTR=[ASYNC:551] [SYNC:9]
 SLICEL_FFY
  • CE=[CE:282] [CE_INV:32]
  • CK=[CK:534] [CK_INV:47]
  • D=[D:540] [D_INV:41]
  • FFY_INIT_ATTR=[INIT0:573] [INIT1:8]
  • FFY_SR_ATTR=[SRLOW:576] [SRHIGH:5]
  • LATCH_OR_FF=[FF:576] [LATCH:5]
  • SR=[SR:130] [SR_INV:22]
  • SYNC_ATTR=[ASYNC:552] [SYNC:29]
 SLICEL_XORF
  • 1=[1_INV:2] [1:256]
 SLICEM
  • BX=[BX_INV:0] [BX:4]
  • BY=[BY:4] [BY_INV:0]
 SLICEM_F
  • LUT_OR_MEM=[LUT:4]
 SLICEM_F5MUX
  • S0=[S0:4] [S0_INV:0]
 SLICEM_F6MUX
  • S0=[S0:4] [S0_INV:0]
 SLICEM_G
  • LUT_OR_MEM=[LUT:4]
 
Pin Data
BUFGMUX
  • I0=11
  • O=11
  • S=11
 BUFGMUX_GCLKMUX
  • I0=11
  • OUT=11
  • S=11
 BUFGMUX_GCLK_BUFFER
  • IN=11
  • OUT=11
 DCM
  • CLK0=2
  • CLKFB=2
  • CLKFX=2
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
 DCM_DCM
  • CLK0=2
  • CLKFB=2
  • CLKFX=2
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
 IBUF
  • I=4
  • ICLK1=1
  • IQ1=1
  • PAD=4
 IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=4
  • IFD_OUT=1
  • SEL_IN=4
 IBUF_IFF1
  • CK=1
  • D=1
  • Q=1
 IBUF_INBUF
  • IN=4
  • OUT=4
 IBUF_PAD
  • PAD=4
 IOB
  • O1=36
  • OTCLK1=3
  • PAD=36
 IOB_OFF1
  • CK=3
  • D=3
  • Q=3
 IOB_OUTBUF
  • IN=36
  • OUT=36
 IOB_PAD
  • PAD=36
 RAMB16BWE
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA3=1
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=1
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=2
  • CLKB=2
  • DIB0=2
  • DIB1=2
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB2=2
  • DIB3=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIB8=1
  • DIB9=1
  • DIPB0=2
  • DIPB1=1
  • DOA0=1
  • DOA1=2
  • DOA10=1
  • DOA11=1
  • DOA12=1
  • DOA13=1
  • DOA14=1
  • DOA15=1
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=2
  • DOA7=2
  • DOA8=1
  • DOA9=1
  • ENA=2
  • ENB=2
  • SSRA=2
  • SSRB=2
  • WEA0=2
  • WEA1=2
  • WEA2=2
  • WEA3=2
  • WEB0=2
  • WEB1=2
  • WEB2=2
  • WEB3=2
 RAMB16BWE_RAMB16BWE
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA3=1
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=1
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=2
  • CLKB=2
  • DIB0=2
  • DIB1=2
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB2=2
  • DIB3=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIB8=1
  • DIB9=1
  • DIPB0=2
  • DIPB1=1
  • DOA0=1
  • DOA1=2
  • DOA10=1
  • DOA11=1
  • DOA12=1
  • DOA13=1
  • DOA14=1
  • DOA15=1
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=2
  • DOA7=2
  • DOA8=1
  • DOA9=1
  • ENA=2
  • ENB=2
  • SSRA=2
  • SSRB=2
  • WEA0=2
  • WEA1=2
  • WEA2=2
  • WEA3=2
  • WEB0=2
  • WEB1=2
  • WEB2=2
  • WEB3=2
 SLICEL
  • BX=387
  • BY=218
  • CE=323
  • CIN=538
  • CLK=689
  • COUT=603
  • F1=1114
  • F2=683
  • F3=261
  • F4=109
  • F5=44
  • FX=2
  • FXINA=22
  • FXINB=22
  • G1=1133
  • G2=755
  • G3=304
  • G4=138
  • SR=237
  • X=317
  • XB=9
  • XQ=560
  • Y=227
  • YQ=581
 SLICEL_C1VDD
  • 1=64
 SLICEL_C2VDD
  • 1=61
 SLICEL_CYMUXF
  • 0=616
  • 1=629
  • OUT=629
  • S0=629
 SLICEL_CYMUXG
  • 0=599
  • 1=603
  • OUT=603
  • S0=603
 SLICEL_F
  • A1=1109
  • A2=683
  • A3=261
  • A4=109
  • D=1177
 SLICEL_F5MUX
  • F=129
  • G=129
  • OUT=129
  • S0=129
 SLICEL_F6MUX
  • 0=22
  • 1=22
  • OUT=22
  • S0=22
 SLICEL_FFX
  • CE=291
  • CK=560
  • D=560
  • Q=560
  • REV=64
  • SR=189
 SLICEL_FFY
  • CE=314
  • CK=581
  • D=581
  • Q=581
  • SR=152
 SLICEL_G
  • A1=1129
  • A2=755
  • A3=304
  • A4=138
  • D=1167
 SLICEL_GNDF
  • 0=353
 SLICEL_GNDG
  • 0=345
 SLICEL_VDDF
  • 1=13
 SLICEL_VDDG
  • 1=4
 SLICEL_XORF
  • 0=258
  • 1=258
  • O=258
 SLICEL_XORG
  • 0=231
  • 1=231
  • O=231
 SLICEM
  • BX=4
  • BY=4
  • F1=4
  • F2=4
  • F3=4
  • F5=4
  • FX=2
  • FXINA=4
  • FXINB=4
  • G1=4
  • G2=4
  • G3=4
  • Y=2
 SLICEM_F
  • A1=4
  • A2=4
  • A3=4
  • D=4
 SLICEM_F5MUX
  • F=4
  • G=4
  • OUT=4
  • S0=4
 SLICEM_F6MUX
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEM_G
  • A1=4
  • A2=4
  • A3=4
  • D=4
 
Software Quality
Run Statistics
Bitgen 12901 12900 0 0 0 0 0
MAP 7036 6838 0 0 0 0 0
NGDBuild 7353 7337 0 0 0 0 0
PAR 6830 6478 322 0 0 0 0
Start 0 0 0 0 0 0 0
_impact 245 241 0 0 0 0 0
bitgen 1 1 0 0 0 0 0
edif2ngd 74833 74829 0 0 0 0 0
map 14 2 0 0 0 0 0
ngc2edif 140 140 0 0 0 0 0
ngcbuild 117 117 0 0 0 0 0
ngdbuild 17 16 0 0 0 0 0
par 2 2 0 0 0 0 0
trce 6484 6480 0 0 0 0 0
xst 7093 6990 0 0 0 0 0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=2 NGDBUILD_NUM_BUFG=8 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DCM_SP=1
NGDBUILD_NUM_FD=15 NGDBUILD_NUM_FDCE=12 NGDBUILD_NUM_FDCPE=8 NGDBUILD_NUM_FDC_1=6
NGDBUILD_NUM_FDE=249 NGDBUILD_NUM_FDPE=2 NGDBUILD_NUM_FDR_1=8 NGDBUILD_NUM_FDSE=2
NGDBUILD_NUM_GND=40 NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=16
NGDBUILD_NUM_LD=2 NGDBUILD_NUM_LUT2=628 NGDBUILD_NUM_LUT3=48 NGDBUILD_NUM_LUT4=235
NGDBUILD_NUM_MUXCY=576 NGDBUILD_NUM_MUXF5=8 NGDBUILD_NUM_OBUF=36 NGDBUILD_NUM_VCC=36
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=2 NGDBUILD_NUM_BUFG=11 NGDBUILD_NUM_DCM_SP=2 NGDBUILD_NUM_FD=143
NGDBUILD_NUM_FDC=97 NGDBUILD_NUM_FDCE=442 NGDBUILD_NUM_FDCE_1=27 NGDBUILD_NUM_FDCP=64
NGDBUILD_NUM_FDCPE=8 NGDBUILD_NUM_FDC_1=11 NGDBUILD_NUM_FDE=443 NGDBUILD_NUM_FDP=8
NGDBUILD_NUM_FDPE=2 NGDBUILD_NUM_FDPE_1=1 NGDBUILD_NUM_FDR=28 NGDBUILD_NUM_FDR_1=8
NGDBUILD_NUM_FDSE=2 NGDBUILD_NUM_GND=86 NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_IBUFG=2
NGDBUILD_NUM_INV=74 NGDBUILD_NUM_LD=10 NGDBUILD_NUM_LUT1=144 NGDBUILD_NUM_LUT1_L=370
NGDBUILD_NUM_LUT2=1068 NGDBUILD_NUM_LUT2_L=103 NGDBUILD_NUM_LUT3=655 NGDBUILD_NUM_LUT3_L=205
NGDBUILD_NUM_LUT4=504 NGDBUILD_NUM_LUT4_L=72 NGDBUILD_NUM_MUXCY=611 NGDBUILD_NUM_MUXCY_L=856
NGDBUILD_NUM_MUXF5=163 NGDBUILD_NUM_MUXF6=28 NGDBUILD_NUM_MUXF7=2 NGDBUILD_NUM_OBUF=36
NGDBUILD_NUM_RAMB16BWE=2 NGDBUILD_NUM_VCC=46 NGDBUILD_NUM_XORCY=671